Computer Memory
In the simplest terms, computer memory is an electronic mechanism that has the ability
to store and retrieve data. The smallest amount of data that can be stored is 1 bit, which
can be represented by either a 1 or a 0 in memory. When you put 4 bits together, it is
called a nibble, which can represent values from 0000 to –1111. There are exactly
16 binary values, ranging from 0 to 15, in decimal format. When you put two nibbles,
or 8 bits, together, you get a byte, which can represent values from 0 to (28 – 1), or 0 to
255 in decimal. When you put 2 bytes together, you get a WORD, which can represent
values from 0 to (216 – 1), or 0 to 65,535 in decimal. Continuing to piece data together,
if you put two words together, you get a double word, or DWORD, which can represent
values from 0 to (232 – 1), or 0 to 4,294,967,295 in decimal. Two DWORDs together
is a quadruple word, or QWORD, which can represent values from 0 to (264 – 1), or 0
to 18,446,744,073,709,551,615 in decimal. In terms of memory addressing on 64-bit
AMD and Intel processors, only the lower 48 bits are used, which offers 256 terabytes of
addressable memory. This is well documented in countless online resources.
to store and retrieve data. The smallest amount of data that can be stored is 1 bit, which
can be represented by either a 1 or a 0 in memory. When you put 4 bits together, it is
called a nibble, which can represent values from 0000 to –1111. There are exactly
16 binary values, ranging from 0 to 15, in decimal format. When you put two nibbles,
or 8 bits, together, you get a byte, which can represent values from 0 to (28 – 1), or 0 to
255 in decimal. When you put 2 bytes together, you get a WORD, which can represent
values from 0 to (216 – 1), or 0 to 65,535 in decimal. Continuing to piece data together,
if you put two words together, you get a double word, or DWORD, which can represent
values from 0 to (232 – 1), or 0 to 4,294,967,295 in decimal. Two DWORDs together
is a quadruple word, or QWORD, which can represent values from 0 to (264 – 1), or 0
to 18,446,744,073,709,551,615 in decimal. In terms of memory addressing on 64-bit
AMD and Intel processors, only the lower 48 bits are used, which offers 256 terabytes of
addressable memory. This is well documented in countless online resources.
Random Access Memory
In RAM, any piece of stored data can be retrieved at any time, the term random
access. However, RAM is volatile, meaning that when the computer is turned off, all
data is lost from RAM. When we’re discussing modern Intel- and AMD-based prod-
ucts (x86 and x64), the memory is 32-bit or 48-bit addressable, respectively, meaning
that the address bus the processor uses to select a particular memory address is 32 or
48 bits wide. Therefore, the most memory that can be addressed in an x86 processor is
4,294,967,295 bytes or 281,474,976,710,655 bytes (256 terabytes). On an x64 64-bit
access. However, RAM is volatile, meaning that when the computer is turned off, all
data is lost from RAM. When we’re discussing modern Intel- and AMD-based prod-
ucts (x86 and x64), the memory is 32-bit or 48-bit addressable, respectively, meaning
that the address bus the processor uses to select a particular memory address is 32 or
48 bits wide. Therefore, the most memory that can be addressed in an x86 processor is
4,294,967,295 bytes or 281,474,976,710,655 bytes (256 terabytes). On an x64 64-bit
Segmentation of Memory
the basic concept is simple. Each process (oversimplified as an executing program) needs to have access
to its own areas in memory. After all, you would not want one process overwriting another
process’s data. Therefore, memory is broken down into small segments and handed out
to processes as needed. Registers,, are used to store and keep
track of the current segments a process maintains. Offset registers are used to keep track
of where in the segment the critical pieces of data are kept. Segmentation also describes
the memory layout within a process’s virtual address space. Segments such as the code seg-
ment, data segment, and stack segment are intentionally allocated in different regions of
the virtual address space within a process to prevent collisions and to allow for the ability
to set permissions accordingly. Each running process gets its own virtual address space, and
the amount of space depends on the architecture (such as 32-bit or 64-bit), system settings,
and the OS. A basic 32-bit Windows process by default gets 4GB, where 2GB is assigned
to the user-mode side of the process and 2GB is assigned to the kernel-mode side of the
process. Only a small portion of this virtual space within each process is mapped to physical
memory, and depending on the architecture, there are various ways of performing virtual-
to-physical memory mapping through the use of paging and address translation
to its own areas in memory. After all, you would not want one process overwriting another
process’s data. Therefore, memory is broken down into small segments and handed out
to processes as needed. Registers,, are used to store and keep
track of the current segments a process maintains. Offset registers are used to keep track
of where in the segment the critical pieces of data are kept. Segmentation also describes
the memory layout within a process’s virtual address space. Segments such as the code seg-
ment, data segment, and stack segment are intentionally allocated in different regions of
the virtual address space within a process to prevent collisions and to allow for the ability
to set permissions accordingly. Each running process gets its own virtual address space, and
the amount of space depends on the architecture (such as 32-bit or 64-bit), system settings,
and the OS. A basic 32-bit Windows process by default gets 4GB, where 2GB is assigned
to the user-mode side of the process and 2GB is assigned to the kernel-mode side of the
process. Only a small portion of this virtual space within each process is mapped to physical
memory, and depending on the architecture, there are various ways of performing virtual-
to-physical memory mapping through the use of paging and address translation